Physical Design Engineer jobs in Delhi (union territory)

PHYSICAL DESIGN ENGINEER/LEAD - NOIDA/Ahmedabad/Bangalore/Hyderabad/Pune(NO WORK FROM HOME OR REMOTE WORK)Job description: 4 to 15 Years of Hands on Experience- Block level Physical Design Implementation from RTL to GDSII or Netlist to GDSII,- Block level Physical Signoff,- Block level Timing Signoff and ECO generation.- Block level Power signoff.- Good skill on Automation (Perl/Tcl/Awk/Python)-...

Senior Physical Design Engineer Location: Bangalore Experience: 5+ Years Key Responsibilities: - SoC top-level and block-level physical implementation (Synthesis, P&R, STA, signoff)- Timing closure for complex blocks and full-chip designs- Top-level floorplanning, clock planning, and high-speed signal planning- CTS debug (HTREE/MSCTS) and skew/latency optimization- PPA optimization (Power,...

Location: Bangalore / India (Hybrid / Onsite) Company: Seminovaa Technologies Pvt. Ltd. Experience: 2–4 years (Mandatory) Domain: ASIC / SoC Physical Design ⚠️ Important Note This position is strictly for professionals with 2–4 years of hands-on Physical Design experience. Freshers, college interns, and trainees will not be considered for this role. About the Role We are seeking a...

About us: Sasken is a pioneer in Product Engineering and Digital Transformation delivering concept-to-market and chip-to-cognition R&D solutions to customers across the semiconductor, automotive, industrial, consumer electronics, enterprise devices, satellite communications, telecom, and transportation domains. Through the last three decades, Sasken’s deep engineering capabilities and technology...

- 4+ years experience in Physical Design- Experience in Floorplanning for SoC using Innovus- Must have a knowledge and implementation strategies to create an IO ring in accordance design specification- Have a deep knowledge on ESD, latch-up etc for foundary requirements and placement strategies- Should have a higherarchial design implementation knowledge which include partitions/HMs/tiles push...

LTTS is hiring for Physical Design Engineers with 5+ Years of experience.Job Location : Bangalore, IndiaJob description is as below ::Top 5 Required Skills/Mandatory skills 1. Synthesis 2. Constraints Management 3. Logic Equivalence Check 4. CLP 5. STA Required Education: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering or Master's degree in Computer...

Job Description- Position: Physical Design Engineer Preferred Experience : 5+ years Location: Noida NP: 0 to 30 days Roles& Responsibilities: PD activities involve Synthesis of RTL to gate netlist, Netlist level optimization , RTL to Gate LEC , Scan chain hookup ,STA Constraints management , Floorplan, IR Drop, Placement/CTS/Routing/Timing Optimization/Timing Closure/DRC/LVS Tools : Design...

About Us: Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3200+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC...

About Tata Electronics: Tata Electronics (a wholly owned subsidiary of Tata Sons Pvt. Ltd.) is building India’s first AI-enabled state-of-the-art Semiconductor Foundry. This facility will produce chips for applications such as power management IC, display drivers, microcontrollers (MCU) and high-performance computing logic, addressing the growing demand in markets such as automotive, computing...

Physical Design Engineer Job Summary The Physical Design Engineer will be responsible for the full-chip and/or block-level physical implementation of complex digital, mixed-signal, or RF integrated circuits from RTL to GDSII (the final manufacturing data). This role requires expertise in design methodologies to achieve optimal performance, power, and area (PPA) targets while ensuring...

Greetings From TCS !!! Role: Physical Design Location: Bangalore Experience Range: 5+ Years Must-Have: - Should have in depth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVS- Should have worked on the latest technology nodes (14nm or 2nm to 5nm)- Must have experience in Static timing analysis- Must have experience in Physical verification and...

Role : Sr Physical Design Lead/BE Integration This position is for senior level engineer Full Chip Physical Design/Integrations/ SoC Floor planning/Bump Planning/ Pin Assignments /Feed through/ LFU Optimization/Physical Verification, Power design/implementation/signoff. He must have hands on Physical Design experience and must have handled RTL to GDS II at Top level Key Responsibilities: -...

Hi All, We are Hiring: Senior Physical Design Engineers / Architects. Experience:6-25+ Years. Locations:Bengaluru, India.San Jose (Bay Area), USA.Austin, USA.Eligibility (USA): U.S. Permanent Residents (Green Card holders). About the jobQualification Required:Typically requires a minimum of 6+ years of experience in Physical Design with mainstream P&R toolsBachelors OR Masters Degree...

Hiring: Senior Physical Design Engineer Location: Bangalore , Hyderabad Experience: 4–15 Years Employment Type: Full-Time (FTE) ⏳ Notice Period: Immediate to 90 Days Key Skills & Responsibilities: - End-to-end Netlist-to-GDSII implementation: Floorplanning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification.- Expertise in Physical Design methodologies for 28nm and...

Senior Physical Design Engineer Experience: 6+ Years Location: Bengaluru, India Job Description: We are looking for a highly skilled Senior Physical Design Engineer with 6+ years of hands-on experience to drive end-to-end physical design implementation for advanced SoC designs. The ideal candidate will have strong expertise in RTL-to-GDSII flow, PnR, timing closure, and Innovus-based...

Job Role: Physical Design Engineer- Senior/Lead Location: Bangalore, Hyderabad, Noida and Ahmedabad Experience Required: 5+ ROLE & RESPONSIBILITIES - Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal integrity, Power grid analysis atc in ASIC...

Job Title: Lead Physical Design Engineer Experience: 7+ Years Location: Bangalore/Hyderabad Employment Type: Full-time Industry: Semiconductors / ASIC / VLSI / SoC Design Job Summary: We are seeking a highly experienced and technically strong Lead Physical Design Engineer to drive RTL-to-GDSII implementation for complex SoC or block-level designs. The ideal candidate will lead a team of...

Mirafra Technologies Hiring Physical Design Engineers (Innovus) Engineers: Experience - 4 - 15 years Notice Period - 0 to 45 days Please find the Job Description Below: - Must hands on experience with a solid complex (SOC/sub-systems/SWRPs) implementation and strong understanding in PG/floorplan and physical design flows and methodologies, place and route using tools such as Innovus & FC, and...

L&T Technologies (LTTS) is looking for Physical Design Engineers (PnR)with 4.5+ Years of experience. Job Location : Bangalore Please find the detailed job description below :: • IP/Block level PnR activities from Netlist to GDS-II. • Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like FEV, VCLP, EMIR and PV. • Knowledge...

Title : CPU Physical Design Lead Exp- 10+ Years - High speed core development – Synth, constraints, and Physical Design- Engineer must have significant knowledge on highspeed cores including CPU, GPU, DDR etc- Must have synthesis & Constraints experience with PPA in mind- Must work with RTL designers for optimizations and feedback- Must be knowledgeable on silicon margins, VT trade-off, power...